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DSY

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Digital Logic Design & Microprocessor Lab

  • Teacher: CSE-DDM Deepak Mahajan

Data Structures Lab

  • Teacher: ITE-MSP Manali Patil

Audit Course (Environmental Studies)

Data Communication and Networks Lab

  • Teacher: CSE-CBP Chaitanya Pednekar

Data Communication and Networks

  • Teacher: CSE-CBP Chaitanya Pednekar

Digital Logic Design & Microprocessors

  • Teacher: CSE-DDM Deepak Mahajan

Data Structures

  • Teacher: ITE-MSP Manali Patil

Discrete Mathematical structure

  • Teacher: ITE-VRP Vidya Patil

Computational Mathematics

  • Teacher: BSH-SHD Sachin Dhanani
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